Recently, as a new memory device, a nonvolatile memory based on the vertical MONOS (metal-oxide-nitride-oxide-silicon) structure has been proposed. In manufacturing this memory device, conductive films and insulating films are alternately stacked to form a stacked body. Holes extending in the stacking direction are formed in the stacked body. A charge accumulation layer is formed on the inner surface of this hole. Then, a silicon pillar is buried in the hole. Thus, a memory transistor is formed at each closest point between the conductive film and the silicon pillar.
However, in the future, the packing density of memory devices will be further increased. Then, the number of stacked conductive films is increased. Furthermore, the diameter of the hole is reduced, and the aspect ratio of the hole is increased. This makes it very difficult to form the hole with a vertical side surface, and causes the diameter of the hole to decrease downward. In this case, the upper portion and the lower portion of the hole have different diameters. This causes variations in the characteristics of the memory transistors.